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SystemVerilog for Hardware Description
- RTL Design and Verification
Engelsk
Bogcover for SystemVerilog for Hardware Description af Vaibbhav Taraate, 9789811544071
Specifikationer
Sprog:
Engelsk
Sider:
252
ISBN-13:
9789811544071
Indbinding:
Paperback
ISBN-10:
9811544077
Udg. Dato:
11 jun 2021
Størrelse i cm:
15,6 x 23,3 x 1,8
Oplagsdato:
11 jun 2021
Forfatter(e):

SystemVerilog for Hardware Description

- RTL Design and Verification
Engelsk
Paperback 2021
Format:

Bog beskrivelse
This book introduces the reader to FPGA based design for RTL synthesis. It describes simple to complex RTL design scenarios using SystemVerilog. The book builds the story from basic fundamentals of FPGA based designs to advance RTL design and verification concepts using SystemVerilog. It provides practical information on the issues in the RTL design and verification and how to overcome these. It focuses on writing efficient RTL codes using SystemVerilog, covers design for the Xilinx FPGAs and also includes implementable code examples. The contents of this book cover improvement of design performance, assertion based verification, verification planning, and architecture and system testing using FPGAs. The book can be used for classroom teaching or as a supplement in lab work for undergraduate and graduate coursework as well as for professional development and training programs. It will also be of interest to researchers and professionals interested in the RTL design for FPGA and ASIC.


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Specifikationer
Sprog:
Engelsk
Sider:
252
ISBN-13:
9789811544071
Indbinding:
Paperback
ISBN-10:
9811544077
Udg. Dato:
11 jun 2021
Størrelse i cm:
15,6 x 23,3 x 1,8
Oplagsdato:
11 jun 2021
Forfatter(e):
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